In mixed-signal ICs the analog units are composed of embedded digital blocks which are used to time some delicate analog behavior as switched capacitors, current/voltage sources and amplifiers. Such digital blocks may have many configuration bits enabling a controlled functionally of these blocks. In array based analog units such as analog-to-digital converters (ADCs), imagers, sensors and phase arrays, the total amount of configurable bits can exceed several thousands.
The controlled bits are accessed by on chip/remote host which can configure them according to the required mode of operation. The problem is that being embedded inside the analog unit, which is designed by custom layout engineers, every bit requires manual stretching of wires from the embedded block to the interface of analog and the digital units. From this point, the signal is routed automatically by the P&R (Place and Route) tools.
To date, there are several solutions to avoid this huge amount of wiring, such as SPI (Serial Periphery Interface) or Parallel CPU I/F (Central Processing Unit Interface). These solutions reduce the burden from the layout designer, but have some penalty in resources, IC area and power. The interface needs to be designed and integrated; the interface adds to the analog unit area and power.
There is a need to provide a mixed-signal integrated circuit without such penalty in resources, IC area and power.